The present invention relates to a digital modulation/demodulation technique, and more particularly to a method for demodulating a Gaussian Filtered Minimum Shift Keying (GMSK) modulated signal, and the apparatus thereof.
Generally, the GMSK method is one of the quadrature modulation methods for transmitting digital data, and a signal modulated by this method has the good properties of constant envelope and a relatively narrow occupied frequency bandwidth, thereby having an advantage of effectively using the limited frequency bandwidth resource of the electromagnetic spectrum. Thus, the GMSK modulation/demodulation method is suited for portable radio communication apparatus and has recently become a most excellent method for portable radio communication in the rapid digitization of portable radio communication apparatus now taking place.
Generally, in the demodulation process of GMSK, the response characteristic of the Gaussian low-pass filter has a response time that is longer than one period with respect to one period of the pulse input, so that the effect of interference generated between symbols which effects the before-and-after symbol data is severe.
Accordingly, the GMSK demodulation apparatus can demodulate the transmitted data exactly by matching the phase and frequency of the local oscillating signal of the local oscillator used therein to those of the carrier oscillating signal used in demodulation, as in cases of other types of digital demodulators.
For this to occur, a conventional GMSK demodulation apparatus uses a phase locking loop circuit that includes a feedback circuit as a circuit for detecting the phase and the frequency of the carrier oscillating frequency to generate a local oscillating signal identical to the carrier oscillating frequency used in the demodulator.
In the case of the GMSK demodulation apparatus that includes an analog type feedback circuit, a high degree of accuracy is required to control the whole system and the circuit structure is so very complicated that miniaturization is very difficult to achieve.
The aforementioned problem will be described with reference to the accompanying drawing.
FIG. 1 is a circuit diagram of a conventional GMSK demodulation apparatus. In FIG. 1, a first mixer 10 mixes an output signal of a first local oscillator 30 which is phase-delayed by .pi./2 and received through a first phase delayer 40 and a demodulated signal received through an input terminal 5 to generate a Q component receiving signal of a baseband frequency. A second mixer 11 mixes an output signal of the first local oscillator 30 and the demodulated signal received through the input terminal 5, to generate an I component receiving signal of a baseband frequency. A clock restoring circuit 20 restores a clock pulse train having a frequency identical to the data transfer rate from the demodulated signal received through the input terminal 5. First and second low-pass filters 50 and 51 filter the Q and I component receiving signals of the baseband frequency, respectively, to remove high frequency noise. First and second absolute value converters 60 and 61 convert the received Q and I component signals of the baseband frequency which are low-pass filtered, according to the clock pulse train restored in the clock restoring circuit 20, into digital data form having a logic state of "1" or "0". An adder 62 sums the received data of the Q and I components generated in the first and second absolute value converters 60 and 61, to generate digital data in its original form prior to modulation. A loop filter 70, third and fourth mixers 12 and 13, and the second phase delayer 41 which functions as a feedback loop circuit, control the phase and the frequency of the output of the local oscillator 30.
As described in FIG. 1, the conventional GMSK demodulation apparatus includes an analog type feedback loop circuit and also a clock restoring circuit 20 that must control the first and second absolute value converters 60 and 61, and since there are many difficulties in its circuit design, miniaturizing the circuit to one chip is not feasible.